Development of EUV interference lithography for 25 nm line/space patterns

Micro and Nano Engineering have published an article by Sahoo et Al about EUV interference lithography. The introduction reads: “recently, various lithography methods were developed to increase integration levels as well as microchips performance metrics by reducing the dimension of active components, thereby strengthening recent advances in modern semiconductor technology”.

Silson’s silicon nitride membranes were used for the experiments which were performed at Taiwan Light Source 21B2 EUV beamline in the National Synchrotron Radiation Research Center (NSRRC).

Follow this link to read more about the research in full!

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